The present invention relates to a semiconductor device, specifically to a semiconductor device including a capacitor having the surface of the electrode roughened, and a method for fabricating the semiconductor device.
A DRAM (Dynamic Random Access Memory) is a semiconductor device which can be formed of one transistor and one capacitor. Various studies have been so far made of structures of such semiconductor device which are denser and more integrated, and also methods for fabricating the semiconductor device of such structures.
Recently, as a structure which provides a larger storage capacitance for a cell area unchanged, a structure including the storage electrode formed of polycrystalline silicon film having the rugged surface (rugged polycrystalline silicon film) is proposed, and various studies are made of such semiconductor device.
A structure of the conventional semiconductor device using rugged polycrystalline silicon film will be explained with reference to FIGS. 21A-21C, 22A-22B and 23A-23B.
First, a transfer transistor is formed on a silicon substrate 100 in a device region defined by a device isolation film 102. The transfer transistor comprises a gate electrode 106 formed through a gate insulation film 104 on the silicon substrate 100, and a source/drain diffused layer 108, 110 in the silicon substrate 100 on both sides of the gate electrode 106 (FIG. 21A).
Then, BPSG film is deposited by, e.g., CVD method on the silicon substrate 100 with the transfer transistor formed on to form an inter-layer insulation film 112 of the BPSG film.
Next, a contact hole 114 which is opened onto the source/drain diffused layer 108 of the transfer transistor is formed in the inter-layer insulation film 112 by the usual lithography and etching (FIG. 21B).
Then, a doped amorphous silicon film 116 is deposited on the entire surface by, e.g., CVD method (FIG. 21C).
Then, the doped amorphous silicon film 116 is patterned by the usual lithography and etching to form a storage electrode 118 (FIG. 22A).
Next, a rugged polycrystalline silicon film 120 is deposited on the entire surface by e.g., CVD method (FIG. 22B).
Then, the rugged polycrystalline silicon film 120 is etched back by anisotropic etching using chlorine (Cl2) as an etching gas. The rugged polycrystalline silicon film 120 on the inter-layer insulation film 112 is removed.
At this time the rugged polycrystalline silicon film 120 on the storage electrode 118 is concurrently removed. However, a surface contour of the rugged polycrystalline silicon film 120 is reflected on the surface of the storage electrode 118. The rugged polycrystalline silicon film 120 remains on the side wall of the storage electrode 118.
Thus, the storage electrode 118 has the rugged surface and has the rugged polycrystalline silicon film 120 formed on the side walls thereof (FIG. 23A).
Then, a silicon nitride film is deposited on the entire surface by, e.g., CVD method to form a dielectric film 122 of the silicon nitride film.
Next, a doped amorphous silicon film, for example, is deposited on the entire surface by, e.g., CVD method to form a cell plate electrode 124 of the doped amorphous silicon film.
Thus, a capacitor formed of the storage electrode 118, the dielectric film 122 and the cell plate 124 is formed (FIG. 23B).
Thus, a DRAM including the transfer transistor, and a capacitor having the rugged storage electrode is fabricated.
However, the above-described conventional method for fabricating the semiconductor device often causes decrease of a capacitance to a device structure having high aspect ratio of a space between the storage electrodes 118. That is, when an aspect ratio of the space between the storage electrodes 118 is high, an etching rate at the space between the storage electrodes 118 is lowered due to the micro loading effect. In order to completely remove the rugged polycrystalline silicon film 120 between the storage electrodes 118, more etching time is required. Too much etching time decreases a film thickness of the storage electrodes 118. Consequently, the storage electrodes 118 have decreased surface areas, which leads to the capacitance decrease.
In order to depress the capacitance reduction, it is necessary that a doped amorphous silicon film 116 which is to form the storage electrodes are made thicker in advance. However, it makes time of forming the storage electrodes 118 longer and makes it difficult to condition the etching for forming the storage electrodes 118. Furthermore, it more burdens the system for fabricating the semiconductor device.
An object of the present invention is to provide a semiconductor device and a method for fabricating the semiconductor device which permits the surface of the storage electrodes rugged without decreasing a capacitance and complicating the fabrication steps.
The present invention is characterized mainly in that, in etching back the polycrystalline silicon film having the rugged surface (hereinafter called rugged polycrystalline silicon film (which is also called as a HSG (Hemispherical Grain))), an etching gas including a halogen based gas and O2 gas and etching conditions which make the deposition relatively strong with respect to the etching are used. The etching back of the rugged polycrystalline silicon film under such conditions is applied to, e.g., a method for forming a storage electrode having the rugged surface, whereby the storage electrode can have a surface area increased without sacrificing a height of the storage electrode.
The principle of the present invention will be explained by means of an example that the present invention is applied to the etching back of the rugged polycrystalline silicon film formed on the storage electrode pattern.
Generally, the etching process of reactive ion etching is a competing reaction between the deposition and the etching. Here, the deposition is caused by adsorption of neutral radicals, and the etching is caused mainly by ions as an etchant. Respective movements of the radicals and the ions will be explained. The radicals, which are electrically neutral, are isotropic in their moving direction. The ions, which are charged, are anisotropic in the vertical direction of a wafer because the ions are attracted by a plasma sheath voltage. Accordingly, when the etching process is considered in a region of a high aspect ratio, the anisotropic ions are easier to enter the space than the radical, so that the micro loading effect of the radicals is occurred prior to that of the ions. When the space has a small width, the micro loading effect that the ions and the radicals cannot easily enter the space, and the etching rate is low is caused. However, as shown in FIGS. 1A and 1B, in terms of incidence amounts of the ions and those of the radicals, space widths for causing the micro loading effect are different from each other. Resultantly, as a space width is decreased, an etching rate once increases in a certain region due to the micro loading effect of the radicals, and then decreases due to the micro loading effect of the ions (FIG. 1C).
The present invention utilizes different space widths for causing the micro loading effect of the ions and the radical so as to control the etching.
In the present invention, conditions using a etching gas including halogen based gas and O2 gas, which make the deposition stronger are used for etching back the rugged polycrystalline silicon film. Here, conditions for making the deposition stronger mean conditions under which the deposition is relatively strong with respect to the etching. In terms of oxygen flow rates, the conditions may be said to be conditions under which an oxygen gas ratio for causing the deposition is high.
In the initial stage of the etching, i.e., in the stage where the rugged polycrystalline silicon film is present on the entire surface of a wafer, the oxygen in the etching gas is used for the etching on the entire surface of the wafer. Accordingly, oxidation of the surface of the rugged polycrystalline silicon is relatively little, and the etching of the rugged polycrystalline silicon film advances. In this step, the etching conditions make the deposition weak.
When the etching advances, and the rugged polycrystalline silicon film between the storage electrodes and the rugged polycrystalline silicon film in a peripheral circuit region is removed, an area ratio of a region of the wafer entire surface where the silicon is present is decreased to about 10-20 percentage. Accordingly, the oxygen in the etching gas becomes excessive, and the silicon surface of the storage electrode is oxidized. Consequently, the etching on the storage electrode surface substantially stops. In this step, the etching conditions make the deposition stronger.
However, the oxidation of the silicon surface depends on oxygen radicals, and the same phenomena as the above-described micro loading effect takes place. In other words, because oxygen radicals cannot easily enter narrow spaces, such as surface concavities of the rugged polycrystalline silicon film, the oxidation in a region where the surface concavities of the rugged polycrystalline silicon are formed is little. On the other hand, halogen ions as an etchant can enter narrow spaces, such as the surface concavities of the rugged polycrystalline silicon film without causing the micro loading effect, and the etching advances in the surface concavities of the rugged polycrystalline silicon film.
Consequently, the surface convexities of the rugged polycrystalline silicon film protected by the oxygen radicals is not etched, and the etching advances in the surface concavities of the rugged polycrystalline silicon film which is not protected by the oxygen radicals. Accordingly, even after the etching-back of the rugged polycrystalline silicon film, a height of the storage electrode does not substantially change. Additionally, a more deeply rugged surface than the as-deposited rugged polycrystalline silicon film can be formed on the surface of the storage electrode.
FIG. 2 is a graph of height changes of the storage electrode with respect to oxygen flow rates at a 100 sccm chlorine gas flow rate as a halogen gas, under a 1.5 mTorr reaction chamber pressure, and at a 1200 W-ECR power and a 100 W-RF power. In the graph, ♦ represents measured height of the storage electrode near the center of a wafer, and ▪ represents measured height of the storage electrode near the top surface of the wafer. The sample before the etching includes the doped amorphous silicon film of an initial film thickness of 550 nm, and the rugged polycrystalline silicon film formed on the doped amorphous silicon film.
As shown, it is understood that an oxygen flow rate is set to be above 25 sccm, whereby decrease of the storage electrode height can be much depressed. Considering that a thickness of the rugged polycrystalline silicon film is about 50 nm, the decrease of the storage electrode height can be depressed to be about 60 nm.
However, conditions for making the deposition stronger are determined by interrelationships between oxygen amounts (oxygen flow rates) for the deposition and ion energy (RF powers). In other words, when an RF power is high although an oxygen flow rate is high, the etching is often dominant because incidence energy of the ions is high. Oppositely, when an RF power is low although an oxygen flow rate is low, the deposition is often dominant because incidence energy of the ions is low.
In the typical case where a mixed gas of chlorine and oxygen is used as an etching gas, conditions for making the deposition stronger are conditions belonging to the lower right region with respect to the straight line in FIG. 3A. In the typical case where a mixed gas of HBr and oxygen is used, conditions for making the deposition stronger are those belonging to the lower right region with respect to the straight line in FIG. 3B. However, conditions for making the deposition stronger depend on a kind of a used etching gas and various parameters of apparatuses. It is preferable to adjust and set such conditions suitably for etching environments.
FIG. 4 is a graph of oxygen flow rate dependency of etching rates of the doped amorphous silicon film, and of etching selective ratios of the doped amorphous silicon film with respect to the silicon oxide film.
As shown, even when an oxygen flow rate is set to be above 25 sccm, which is the range the present invention can be applied to, the changes of the etching rate and the selective ratio of the doped amorphous silicon film are sufficiently small. Accordingly, setting an oxygen flow rate in the above-described range does not affect the other etching characteristics.
Etching gases which can be used in the present invention are exemplified unlimitedly by Cl2/O2 system, HBr/O2 system, SF6/Cl2/O2 system, SF6/O2 system, SF6/HBr/O2 system, HBr/Cl2/O2 system and these systems mixed with an inert gas (He, Ne, Ar, Xe, N2 or others).
Accordingly, the above-described object is achieved by a semiconductor device comprising: a capacitor which includes a first electrode having a plurality of substantial cylinders on a top surface thereof; a dielectric film formed on the first electrode; and a second electrode formed on the dielectric film.
The above-described object is also achieved by a semiconductor device comprising: a capacitor which includes a first electrode having a side wall and a top surface thereof rugged, concavities formed on the top surface being deeper than those formed on the side wall; a dielectric film formed on the first electrode; and a second electrode formed on the dielectric film.
The above-described object is also achieved by a method for fabricating a semiconductor device comprising the steps of: forming a silicon film on an insulation film; forming on the silicon film a rugged polycrystalline silicon film having concavities on a surface; and etching the rugged polycrystalline silicon film and the silicon film in a region where the concavities are formed to thereby deepen the concavities.
The above-described object is also achieved by a method for fabricating a semiconductor device comprising the steps of: forming a silicon film on a substrate; forming a rugged polycrystalline silicon film having concavities on a surface; etching the rugged polycrystalline silicon film and the silicon film in a region where the concavities are formed to thereby deepen the concavities to form a surface rugged first electrode of the rugged polycrystalline silicon film and the silicon film; forming a dielectric film on the first electrode; and forming a second electrode on the dielectric film.